1. Field
This disclosure relates generally to provisioning resources on public cloud infrastructure or hybrid cloud infrastructure to perform electronic design automation (EDA) tasks.
2. Description of the Related Art
An electronic design automation (EDA) refers to software tools or processes of designing integrated circuit (IC) devices with the aid of computing devices. An EDA process generally includes, for example, system design operations, logic design and functional verification, synthesis, netlist verification, design planning, physical implementation, analysis and extraction, physical verification, resolution enhancement, and mask data preparation. EDA tools dedicated to one or more of these tasks are commercially available from EDA tool developers such as Synopsys, Inc. of Mountain View, Calif. Generally, the EDA tool developers grant licenses to use the EDA tools in return for licensing fees. The licensing fees increase as the number and types of accessible EDA tools increase.
As more components are integrated into an IC device and more functions are accommodated in the IC device, some EDA task sets have come to require a large amount of computing and storage resources. Some EDA task sets may take days, weeks or even months to accomplish. To reduce such an extended runtime or meet other constraint conditions, EDA task sets may be divided into multiple smaller EDA tasks and then executed on multiple computing resources (e.g., servers) in parallel. Some EDA tasks may take longer to finish while other EDA tasks may finish in relatively short time. Also, accomplishment of an EDA task may be a prerequisite to performing another EDA task. Hence, a careful planning of the EDA tasks is needed to accomplish the EDA tasks within the constraint conditions.
If computer resources are under-provisioned, the EDA task set may not be finished within time. Hence, in many cases, redundant computing resources are provisioned to ensure that the EDA tasks are finished within time. However, over-provisioning computing resources increases the cost associated with the EDA tasks.
Generally, the EDA task sets are performed intermittently depending on the design cycle of the designer's IC devices. During times when a new IC device is not being developed, the developer's servers or server farms may remain idle. If the servers or server farms are under-provisioned, however, there may be insufficient resources when the designer is actively designing the IC devices. The large fluctuation in the computing demand as a result of the design or product cycle renders performing the EDA tasks entirely in private infrastructure inefficient.